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CEO, Heartwood Studios

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Managing Director, Real Time Systems

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Scientist 'F' AEI Division

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Scientist 'E', Div. Naval FCS, IRDE

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Vice President (Systems)

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Ex Scientist, DRDO, Dean R&D, NMIT

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Director, IRDE, Dehradun

" KritiKal was asked to provide CAIR with a training on video codec internals. The training provided was comprehensive and hands-on. It has greatly helped our technical activities. K..."

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Scientist 'F' Head, Computer Vision Group

" "Last two years have been working with KritiKal Solutions in defining a tool which helps in traffic planning for our vehicle mix. The tool delivered by them is helping our team for..."

Dr. Geetam Tiwari
TRIPP, IIT Delhi

" I believe that traffic conditions in developing countries in general and India in particular are so different from those in the West that we need to develop our own analysis and pl..."

Dr. Dinesh Mohan
TRIPP, IIT Delhi

" It was after trying two other design houses, we finally found Kritikal Solutions for designing complete product engineering solution for Safety and Data Information Systems for Mat..."

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VP Operations, Wylie Indicators Ltd.

Generic Embedded Development Kit

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Verticals:	Custom Product Development
Technologies:	FPGA & CPLD,Embedded Software
Tags:	Xilinx, Actel, Altera, Leon, Stratix, Virtex, FPGA Design Flow, HW SW Codesign, Platform FPGAs

CLIENT Client is a US based leading supplier of innovative software solutions that enable the rapid and effective design of programmable logic devices (FPGAs, PLDs and CPLDs) and are used in a wide range of communications, military/aerospace, consumer, semiconductor, computer, and other electronic systems markets OBJECTIVE To design a Generic Embedded Design Kit (GEDK) with vendor independent flow that can be used for a generic platform FPGA based design. GEDK uses wrappers for custom IPs to promote standardization, reusability and portability of IPs across platforms / FPGA families. PROJECT SCOPE The current FPGA design flow ties down the user to a specific FPGA family / vendor. Moreover unlike before, current synthesis tools from vendors are integrated much more with the flow and thus provide user friendly interfaces for the complete flow. Hence, portability among various platforms and designs is desirable for both product cost reduction as well as for enhancing the life time of the designs. The scopes of project comprised of understanding the common and essential features of FPGA platform design kits available in the market and discover the feasibility of developing a Generic Flow. The target devices were selected from multiple vendors like Xilinx and Altera. Though at the end, the objective was to prove the feasibility around open source LEON architecture CHALLENGES: GEDK should support multiple processor-bus platforms. The specific bus and platform details need to be studied. GEDK should be seamless for porting custom IPs from one platform to another KRITIKAL'S ROLE KritiKal did a study of Xilinx, Altera and Leon flows and carried out experiments on them. After carrying out the comparative analysis of above mentioned three flows the following key features of GEDK were decided :- Processor and Bus support Portable Library IPs Portable Custom IPs Debug Support Coprocessor generation and interfacing Board Integration Simulation Runtime software support After that, specifications were decided for automatic wrapper generation. Following that a generic GEDK flow was analyzed, issues identified and a framework was proposed along with certain specific GEDK tools for the product. A number of generic IPs were successfully interfaced across three different bus architectures using the GEDK.

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