PDH Framer Core

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PDH Framer Core is a general purpose PDH Framer IP core. It supports framing capabilities for a host of protocols like E1, E2, E3, T1, T2, T3 etc. PDH Framer IP core can be imported into any user FPGA logic requiring PDH framer capability.
PDH Framer

 

Features

  • Multi protocol support on a single platform.
  • Protocols supported: E1, E2, E3, T1, T2, T3.
  • Generic Design - Adapts to any of the above serial protocols just by change of firmware.
  • Frames to ITU-T G.704 basic and CRC-4 multiframe formatted E1 signals and is consistent with ITU-T G.706 specifications.
  • Frames to popular T1/E1 standards:
    • T1: SF, ESF, SLC-96, T1DM
    • E1: PCM-30, G.704, G.706, G.732
  • Compliant to ITU-T G.703/G.742/G.751, E2 / E3 Framing and multiplexing / de-multiplexing standards.
  • Supports Frame Structures from 2 bits to 64 Kbytes.
  • Programmable Polynomial CRC.
  • Multiple Frame Sync Support: e.g. Normal Frame Sync + CRC4 multi-frame-sync in case of E1.
  • Programmable pattern register for configurable synchronization pattern.

 Applications

  • High density Internet E1/E2/E3/T1/T2/T3 interfaces for multiplexers, switches, routers, and digital modems.
  • Frame Relay Switches and Access Devices
  • Digital Access and Cross-Connect Systems
  • PDH Add / Drop Multiplexers (ADMs)